In most computers, there is a strong affinity between the central processing unit (CPU) or units and the physical random access memory (RAM) that holds data currently in use by programs running on the computer. Typically, the RAM is located close to the CPUs, often on the same printed circuit board, and is connected to the CPUs by a dedicated infrastructure that ensures memory coherency and low latency. In this sort of system, the size of the memory available to the CPUs is limited to the amount of physical RAM that is actually present in the computer.
In contrast to this conventional model, memory sharing among computers in a cluster is becoming increasingly common in virtualized environments, such as data centers and cloud computing infrastructures. For example, U.S. Pat. No. 8,266,238 describes an apparatus including a physical memory configured to store data and a chipset configured to support a virtual machine monitor (VMM). The VMM is configured to map virtual memory addresses within a region of a virtual memory address space of a virtual machine to network addresses, to trap a memory read or write access made by a guest operating system, to determine that the memory read or write access occurs for a memory address that is greater than the range of physical memory addresses available on the physical memory of the apparatus, and to forward a data read or write request corresponding to the memory read or write access to a network device associated with the one of the plurality of network addresses corresponding to the one of the plurality of the virtual memory addresses.
As another example, U.S. Pat. No. 8,082,400 describes firmware for sharing a memory pool that includes at least one physical memory in at least one of plural computing nodes of a system. The firmware partitions the memory pool into memory spaces allocated to corresponding ones of at least some of the computing nodes, and maps portions of the at least one physical memory to the memory spaces. At least one of the memory spaces includes a physical memory portion from another one of the computing nodes.